A Simulation Study Of Silicon Nanowire Field Effect Transistors Fets

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A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs)

A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs)
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Total Pages : 145
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ISBN-10 : OCLC:182860675
ISBN-13 :
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Book Synopsis A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs) by :

Download or read book A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs) written by and published by . This book was released on 2007 with total page 145 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract Silicon planar MOSFETs are approaching their scaling limits. New device designs are being explored to replace the existing planar technology. Among the possible new device designs are Double Gate (DG) FETs, FinFETs, Tri-Gate FETs and Omega- Gate FETs. The Silicon Nanowire Gate All Around (GAA) FET stands out as one of the most promising FET designs due to its maximum gate effect in controlling the short channel effects. Recent developments such as synthesis of highly ordered nanowires and fabrication of nanowires as small as 1nm in diameter have illustrated the progress possible in silicon nanowire technology In this study we have explored the silicon nanowire FET as a possible candidate to replace the currently planar MOSFETs. In this thesis we investigated the silicon nanowire FET device and compared its performance with that of a double gate (DG) FET. The software used for the study assumed quantum-ballistic transport (NanoWire), which was developed at Purdue University. Initially, we presented a comparison of Nanowire FET with DG FET with for devices with same physical parameters. It was seen that superior subthreshold characteristics are exhibited by a silicon nanowire FET. We also conducted an optimization study for the 25 nm node from the ITRS report. The final device was optimized for both High Performance and Low Operating Power applications. A further study on future technology nodes down to the 14 nm node was performed which revealed short channel effects becomes significant at gate lengths ~ 5 nm even for a silicon nanowire device. Finally, a process variation study was conducted in comparison with a FinFET device. It was concluded that a silicon nanowire FET shows less sensitivity to process variation except it has higher sensitivity in variation with the diameter at less than ~4 nm than for FinFET where significant quantum effects set in. Variation with the gate length was found to be much less sensitive for the silicon nanowire FET because of its superior gate control characteristics.


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