Address Space Translation For Fpga Accelerated Simulators

Download or read book Address Space Translation for FPGA Accelerated Simulators written by Michael Thaddeus Chamberlain and published by . This book was released on 2015 with total page 40 pages. Available in PDF, EPUB and Kindle. Book excerpt: Microarchitectural simulation is needed to help explore the large design space of new computer systems. These simulations are taking increasingly longer amounts of time to run due to the increasing complexity of modern processors. Co-simulation and high level synthesis are promising fields to improve the overall time required for microarchitectural simulators, and can contribute to low design times and fast simulation speeds permitting a larger range of design space exploration. While promising, co-simulation techniques must find effective ways to map the host memory address space to the FPGA memory address space to be able to correctly transfer simulation data between the host and FPGA.