A Simulation Study Of Enhancement Mode Indium Arsenide Nanowire Field Effect Transistor

Download or read book A Simulation Study of Enhancement Mode Indium Arsenide Nanowire Field Effect Transistor written by Harish Narendar and published by . This book was released on 2009 with total page 113 pages. Available in PDF, EPUB and Kindle. Book excerpt: As device dimensions continue to shrink into the nanometer length regime, conventional complementary metal-oxide semiconductor (CMOS) technology will approach its fundamental physical limits. Further miniaturization based on conventional scaling appears neither technically nor economically feasible. New strategies, including the use of novel materials and one-dimensional device concepts, innovative device architectures, and smart integration schemes need to be explored. They are crucial to extending current capabilities and maintaining momentum beyond the end of the technology roadmap. Semiconducting nanowires are an attractive and viable option for channel structures. By virtue of their potential one-dimensionality, such nanoscale structures introduce quantum confinement effects, thus enabling new functionalities and device concepts. In this thesis we study performance limits of Indium Arsenide nanowire Field Effect Transistors (InAs NWFETs) in a Gate All Around (GAA) structure and examine its upper limits of performance. InAs in particular is an attractive candidate for NW-based electronic devices because of its very high electron mobility at room temperature of 30,000 cm2/Vs in comparison to silicon's mobility of 1480 cm2/Vs. The device simulations were carried out using MultiGate Nanowire (Nanowire MG) simulator made available at NanoHUB (www.nanohub.org) by Network for Computational Nanotechnology (NCN). The InAs NWFET was simulated for variations in channel diameter, channel length, oxide thickness and the corresponding Id -- Vg characteristics were analyzed. Short Channel Effects (SCEs) namely Drain Induced Barrier Lowering (DIBL) and threshold voltage roll off were studied. Sub-threshold slope and ON/OFF current variations were analyzed for variations in device dimensions. Finally the device characteristics of Silicon Nanowire Field Effect Transistors (Si NWFETs) were simulated for the same variations in channel diameter, channel length and oxide thickness and a comparative study of the device performance between InAs NWFET and Si NWFET was carried out to assess the effect of varying the channel material system. It was concluded that Silicon NWFET showed higher immunity towards threshold voltage roll off with scaling in channel length and exhibited better sub-threshold slopes for the same device structure in comparison to the InAs NWFET. Also it was observed that Silicon NWFET operated with lower leakage currents compared to InAs NWFET. Overall it was concluded that SiNWFET exhibited higher immunity towards short channel effects while InAs NWFET showed higher drive currents in the order of 0.10x10^(−3) A/ [mu] m compared to 8.4x10^(−6) A/ [mu] m which would translate to higher switching speeds.